Synflow Creates An Open-Source Hardware Ethernet MAC To Demonstrate Next-Generation Design

Press Release | Synflow | April 7, 2014

Synflow has created the first open-source hardware Ethernet MAC core written in a modern language to showcase its next-generation design technology. Interested parties (companies and organizations) willing to contribute or to use the core are invited to contact Synflow.

Rennes, France (PRWEB) April 07, 2014-Synflow SAS announced today that it will start providing support for the first open-source hardware Ethernet MAC core written in a modern language, available on Github at https://github.com/synflow/ethernet-mac.

This Ethernet MAC core implements the IEEE 802.3 specification with:

  • full-duplex Ethernet for 10/100/1000 Mbps
  • direct interface to user application (no processor needed)
  • on receive, checks frame length, CRC, and filters based on MAC address
  • on send, encapsulate in MAC layer (addresses, type, CRC computation)

The core is FPGA-proven and available on Github under BSD license. Contributions are welcome, and modifications without redistribution and commercial use are permitted as specified in the license.

This Ethernet core is written in a new, modern language called C~ (pronounced "C flow"). Compared to existing open-source implementations of hardware Ethernet MAC cores described with industry-standard Verilog or VHDL, C~ code is easier to understand, modify, debug, and integrate. The C~ language was created by Synflow as part of the disruptive technology that the company is making for hardware engineers and designers. This language is suitable for designing SoCs and most types of IP cores by using the right, intermediate level of abstraction that increases productivity and gives high performance at the same time.

Synflow is the first company to demonstrate next-generation design of a hardware Ethernet MAC and make it publicly available as open-source. Most silicon today is still designed with low-level languages dating back to the 1980's. Commercial tools are available for designing cores with SystemC or with higher-level C/C++, but only provide very limited examples, typically filters or simple DSP code. In addition these tools require users to purchase evaluation licenses to gain access to the product, to the documentation, or to get access to more complex code samples. By contrast, Synflow believes in transparency and results.

About Synflow
Synflow SAS is an EDA start-up company that helps semiconductor companies and hardware designers reduce costs and accelerate developments of IP cores and SoCs. Synflow develops EDA tools and is pushing the industry forward by moving to next-generation design methods. Learn more at https://www.synflow.com.